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CSR Issue Jan-Feb 2023
Chip Scale Review
January February 2023
Volume 27, Number 1

Recently, through-silicon via (TSV) technologies have been widely used in high-bandwidth memory for high-performance computing or high-density memory modules. For mobile memory packaging, conventional wire bonding is still being used, due in part to cost considerations. As overall mobile memory system performance is improved, however, there is a need for a thinner package that has better thermal and electrical performance. Inside this latest issue of CSR, the Hynix Integrated Fanout Memory (HIFOM) is described—it’s a chip stackable fan-out wafer-level package that offers better performance than conventional wire-bonded type memory packages.
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Cover image courtesy of iStock/Sunshine Seeds

CSR March April 2023
Chip Scale Review
March April 2023
Volume 27, Number 2

In response to a decade of slowing of Moore’s Law, the semiconductor industry has embraced advanced packaging with 2.5D and 3D platforms to address market demand. Advances in packaging are leading the way to innovate product roadmaps. At the center of revolutionary products today is hybrid bonding, which is expected to become more pervasive in the chiplet era.
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Cover image and feature article entitled 3D chiplet integration with hybrid bonding is contributed by Adeia

CSR May June 2023 Issue
Chip Scale Review
May June 2023
Volume 27, Number 3

The drivers of semiconductor packaging technologies include meeting the packaging performance requirements for applications related to artificial intelligence (AI) processors, high-performance computing (HPC) and high-bandwidth memory (HBM), datacenter devices, network processors, and virtual reality devices. Related to the demand for AI and HPC are supply chain issues for advanced IC substrates. Articles in this issue offer solutions to some of these challenges
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Cover image courtesy of iStockphoto/jiefeng jiang

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