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factors. Once again, we partnered with
                                                                              Socionext to develop prototype design
                                                                              approach based on a quick turnaround
                                                                              time design environment to solve these
                                                                              needs (Figure 6). The solution uses
                                                                              simulations of electrical characteristics
                                                                              from prototyped design as the design
                                                                              becomes more detailed. It is a closed-
                                                                              loop approach where the design definition
                                                                              drives the simulations that influence the
                                                                              design. The solution also supports multi-
                                                                              company collaboration and contribution
                                                                              for analyses. It leverages the IEC 63055/
                                                                              IEEE  2401  authorized  LPB  format.
                                                                              Additionally, it supports short turn
                                                                              around time (TAT) iteration, chip floor
                                                                              planning, pin assignment, substrate auto-
                                                                              route, and reuse reference design on the
                                                                              package. Ultimately, the prototype design
                                                                              approach allows engineers to answer key,
                                                                              early development questions in a new,
                                                                              faster way. This method empowers better
                                                                              decisions and provides other benefits
                                                                              throughout the development process

                                                                              References
                                                                                1. “Moore’s law slows while costs
                                                                                  continue to increase,” https://
                                                                                  fuse.wikichip.org/wp-content/
                                                                                  uploads/2017/12/amd-iedm-2017-23-
                                                                                  1024x579.png
                                                                                2. “GLOBALFOUNDRIES halts 7nm
                                                                                  work,” https://www.eetimes.com/
                                                                                  globalfoundries-halts-7nm-work/#
                                                                                3. “ Q u a l c o m m a n n ou n c e s
                                                                                  5 G S n a p d r a g o n 8 6 5 c h i p ,”
                                                                                  h t t p s : //w w w. t h ev e r g e . c om /
                                                            P                   4. Yole Développement: http://yole.
                                                                                  circuitbreaker/2019/12/4/20995562/
                                                                                  qu a lc o m m- s n a p d r a g o n- 8 65 -
                                                              RoHS
                                                                                  5g-camera-gaming-ar tif icial-
                                                                                  intelligence-improvements
                                                                                  f r/Ad vPa ck a g i n g _ I n d u s t r y _
                                                                                  AS E T e c h F o r u m. a s p x # .
                                                                                  XlQMtWhKiUl
                                                                                5. Y. Fujita, K. Koga, S. Ohtani, D.
                                                                                  TsuTsui, “Quick prototyping design
                                                                                  for More than Moore era,” 2019
                                                                                  15th International Conference and
                                                                                  Exhibition on Device Packaging.


                       Biographies
                         Yoko Fujita is a Senior Partner in the EDA Business Unit at Zuken, Inc., Yokohama, Japan. She is responsible
                       for driving the R&D activity of chip/package/PCB co-design solutions. Before joining Zuken, she was a manager
                       at an EDA startup company where she was responsible for product development of semiconductor design tools.
                       Prior to that she worked at NEC Electronics focusing on the development of CAD for semiconductor design.
                       Email yoko.fujita@jp.zuken.com
                         Tuan Hoang is an Application Engineer at Zuken, Inc., San Jose, CA. He has been in the EDA industry for more
                       than 20 years, specializing in packaging and PCB design and has been part of the Zuken, Inc. team since 2016.


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