Page 37 - Chip Scale Review_November December_2021-digital
P. 37
graphene, and synthesized in a CMOS- “ M o d e l i n g , a n a ly si s , a n d robustness of graphene,” IEEE
compatible manner, can not only help design of graphene nano-ribbon Trans. on Electron Devices, vol. 61,
overcome such major bottlenecks in interconnects,” IEEE Trans. on no. 6, pp. 1920-1928, 2014.
CMOS technologies, but also bring Electron Devices, vol. 56, no. 8, 15. R. Chau, “Process and packaging
unprecedented energy-efficiency and pp. 1567-1578, 2009. in novations for Moore’s law
performance gain in next-generation IC 7. J. Jiang, J. Kang, W. Cao, X. continuation and beyond,” IEEE
products. Thereby, these inventions have Xie, H. Zhang, J. H. Chu, et al., Inter. Electron Devices Meeting,
established a revolutionary new BEOL “Intercalation doped multilayer- pp. 1.1.1-1.1.6, 2019.
technology platform for future ICs and graphene-nanoribbons for next- 16. E. Siegel, “The last barrier to
paved the way for graphene’s entry into generation interconnects,” Nano ultra-miniaturized electronics
mainstream electronics. Letters, vol. 17, no. 3, pp. 1482- is broken, thanks to a new type
1488, 2017. of inductor,” 2018. [Online].
Acknowledgement 8. J. Jiang, J. H. Chu, K. Banerjee, Available: https://www.forbes.com/
T h e r e s e a r c h s u m m a r i z e d i n “C MO S - c o m p a t ible d o p e d - sites/startswithabang/2018/03/08/
this ar ticle was conducted in the multilayer-graphene interconnects breakthrough-in-miniaturized-
Nanoelectronics Research Lab at UC for next-generation VLSI,” IEEE i nd uc t or s -t o -r evolut ion i z e -
Santa Barbara and was supported over Inter. Electron Devices Meeting, pp. electronics/?sh=84ecbd4779ec
the years by the DoD (AFOSR and 34.5.1-34.5.4, 2018. 17. K. Agashiwala, A. Pal, W. Cao, J.
ARO), DoE, NIST, NSF, and SRC. 9. J. Kang, Y. Matsumoto, X. Li, J. Jiang, K. Banerjee, “Can kinetic
Jiang, X. Xie, K. Kawamoto, et al., inductance in low-dimensional
References “On-chip intercalated-graphene materials enable a new generation
1. K. Banerjee, A. Mehrotra, “Global inductors for next-generation radio of RF electronics?,” IEEE Inter.
(interconnect) warming,” IEEE frequency electronics,” Nature Electron Devices Meeting, pp.
Circuits and Devices Magazine, Electronics, vol. 1, no. 1, pp. 46, 24.4.1-24.4.4, San Francisco, 2018.
vol. 17, no. 5, pp. 16-32, 2001. 2018. 18. W. Liu, J. Kang, K. Banerjee,
2. C.-K. Hu, J. Kelly, H. Huang, 10. K. Agashiwala, J. Jiang, K. Parto. “ C h a r a c t e r i z a t io n of Fe Cl 3
K. Motoyama, H. Shobha, Y. D. Zhang, C. H. Yeh, K. Banerjee, intercalation doped CVD few-layer
Ostrovski, et al., “Future on-chip “ D e m o n s t r a t io n of C MO S - graphene,” IEEE Electron Device
interconnect metallization and compatible multi-level graphene Letters, vol. 37, no. 9, pp. 1246-
electromigration,” IEEE Inter. interconnects with metal vias,” 1249, 2016.
Reliability Physics Symp., pp. IEEE Trans. on Electron Devices, 19. J. Jiang, K. Parto, W. Cao, K.
4F.1.1-4F.1.4, 2018. vol. 68, no. 4, pp. 2083-2091, 2021. Banerjee, “Ultimate monolithic-
3. C. K. Hu, E. G. Liniger, L. M. 11. S. Thomas, “CMOS-compatible 3D integration with 2D materials:
Gignac, G. Bonilla, D. Edelstein, graphene,” Nature Electronics, vol. R a t i o n a l e , p r o s p e c t s , a n d
“Materials and scaling effects on 1, no. 12, pp. 612, 2018. challenges,” IEEE Jour. of Electron
on-chip interconnect reliability,” 12. K . B a n e r j e e , A . M e h r o t r a , Devices Soc., vol. 7, pp. 878-887,
MRS Online Proc. Lib., vol. 1559, “A powe r- o p t i ma l r e pea t e r 2019.
2013. insertion methodology for global 20. D. Zhang, C. H. Yeh, W. Cao,
4. K. S. Novoselov, A. K. Geim, S. V. i nt ercon nect s i n n a nomet er K. Baner jee, “0.5T0.5R- A n
Morozov, D. A. Jiang, Y. Zhang, S. designs,” IEEE Trans. on Electron ultracompact RRAM cell uniquely
V. Dubonos, et al., “Electric field Devices, vol. 49, no. 11, pp. 2001- e n a b l e d b y v a n d e r Wa a l s
effect in atomically thin carbon 2007, 2002. heterostructures,” IEEE Trans. on
films,” Science, vol. 306, no. 5696, 13. C. Xu , H. Li , K . Ba ne r je e, Electron Devices, vol. 68, no. 4,
pp. 78-83, 2004. “Graphene nano-ribbon (GNR) pp. 2033-2040, 2021.
5. M. Y. Han, B. Oz yilmaz, Y. interconnects: A genuine contender
Zhang, P. Kim, “Energy band- or a delusive dream?,” IEEE Inter.
gap engineering of graphene Electron Devices Meeting, pp.
nanoribbons,” Physical Review 8.5.1-8.5.4, 2008.
Letters, vol. 98, no. 20, pp. 206805, 14. H . Li , C. Ru s s , W. Liu , D.
2007. Johnsson, H. Gossner, K. Banerjee,
6. C. Xu , H. Li , K . Ba ne r je e, “On the electrostatic-discharge
Biographies
K. Agashiwala, J. Jiang, A. Kumar, C-H. Yeh, and K. Banerjee are with the Nanoelectronics Research Lab
(NRL) at U. of California, Santa Barbara, CA. Correspondence and queries should be addressed to the contact
author, K.B. (kaustav@ece.ucsb.edu)
35
Chip Scale Review November • December • 2021 [ChipScaleReview.com] 35