Page 33 - Chip Scale Review_March April_2022-digital

is ideal for analog circuitry including metal (25-50µm), microvias were vias to the power contact pads to handle
low-voltage sensors and high-frequency replaced with large diameter vias (100- the high current [7]. Another example
circuits. Either full or partial ground 200µm), line widths were increased of a low-power ECP process being
planes can be fabricated in the overlay (100-1000µm), and dielectric thickness extended into high power is Infineon’s
structures for switching noise isolation was increased (50-100µm) for higher Blade technology.
or transmission line impedance control. breakdown capability. A high-power Figure 11 shows a cross-section
Figure 9 depicts a mixed analog/digital POL module is shown in Figure 10. of a typical embedded power module
control module processed in the COF It depicts an 800A, 600V switch with available from Infineon, TDK, ASE and
ECP technology. eight insulated-gate bipolar transistors others. It has a thick copper base plate,
(IGBTs) embedded under one overlay a power diode and a power transistor
interconnect layer with arrays of large solder attached to the base plate, arrays

Figure 9: Mixed analog/digital COF module with
embedded chips and passive devices.
High-power modules. Although
most ECP technologies were developed
with interconnect structures featuring
thin metallizations (5-10µm), small
microvias (15-25µm), narrow lines (10-
25µm) and thin dielectric layers (15-
25µm) targeting lower power digital
circuits, these technologies can be easily
beefed up to handle power circuits.
These features could not support the
high voltages, high currents and high
power dissipation of a high-power
circuit. One example of a high-power
ECP is the GE power overlay (POL)
ECP technology. The COF process was
modified using thicker interconnect

P
RoHS

Figure 10: High-power, 800A, 600V, switch module
with eight IGBT chips fabricated with the GE POL
ECP process.

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