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mounting die and the pocket side   spray coater and high depth of focus   throughput of the flip-chip mounting
        walls. Because the chemical solution’s   exposure system need to be used   machine by optimizing the design
        silicon concent ration affects the   for attaining a three-dimensional   rule for space/distance between the
        etching rate, this information is used   s t r u c t u r e  l i t ho g r a p h i c a l l y.  I n   mounting die and the pocket side walls
        to set the condition of pocket depth   t h e b a ck- e n d p r o c e s s f low, d ie   in consideration of the machine’s
        control. By using the feedback system   mounting and wafer over-molding   accuracy and the self-aligning effect
        with respect to silicon concentration,   are key technologies to realize this   during reflow.  Compression molding
        the etching depth was stabilized and   package. It is important to select a   equipment is also indispensable in the
        the process capability, Cpk, improved   low-damage, high-speed f lip-chip   wafer over-molding process. It is also
        significantly from 1.00 to 2.54.   mounting machine for die mounting.   important to select the proper resin
          In  addition  to  the  above  steps,  a   Fu r t h e r m o r e , we  m a x i m i z e  t h e   for wafer warp control. To assure
                                                                              quality,  package-level  reliability
                                                                              testing is completed using the basic
                                                                              flow. Board-level reliability testing
                                                                              was also completed on the products
                                                                              that are assembled and mounted on the
                                                                              printed circuit board (PCB). The test
                                                                              conditions and the results are shown
                                                                              in Table 1. All reliability test items in
             LEADERS IN                                                       the table also passed.
             MICRO DISPENSING                                                 Dual-die mounting technology
                                                                                T he advant age of the dual- die
             TECHNOLOGY                                                       mounting technology is that two dies
                                                                              are mounted in a stack and electrically
                                                                              connected without the costly through-
             SMALL REPEATABLE VOLUMES                                         silicon via (TSV) technology. Figure
             ARE A CHALLENGE, BUT NOT                                         4 shows the package structure and
             IMPOSSIBLE IF YOU HAVE BEEN                                      an example of the dual-die mounting
             CREATING THEM AS LONG AS WE HAVE.                                package with the control IC (using
                                                                              LSI  manufact uring  technologies)
                                                                              and memory. Owing to structural
                                                                              constraints, the die that is mounted on
             TO DO IT WELL,                                                   the lower side must be smaller than
             WE PROVIDE THREE THINGS:                                         the one mounted on the upper side.
                                                                                The  X-ray photograph (Figure  4)
                                                                              shows interconnects from these dies
                                                                              up to the external terminals through
                                                                              the Cu routing and solder bumps.
             Dispensing Expertise in a variety of microelectronic             During our product qualif ication
             packaging applications.                                          testing, we confirmed that there is
                                                                              no problem with device performance
             Feasibility Testing & Process Verification based                 because of the package stress, and no
             on years of product engineering, material flow testing           issue with the application’s operation
             and software control.                                            either. This package has the same
                                                                              key processes as used for single-
             Product Development for patented valves,                         die mounting, but has challenges
             dispensing cartridges, needles, and accessories.                 specific to the dual-die packaging
                                                                              structure. So, by solving the specific
                                                                              challenges associated with dual-die
                                                                              mounting, we were able to achieve a
                                                                              new packaging technology.

             Our Micro Dispensing product line is proven and trusted by       Necessity of optimized design rules
             manufacturers in semiconductor, electronics assembly, medical    for 3D structures
             device and electro-mechanical assembly the world over.             A s  n o t e d a b ove ,  t h e d u a l- d ie
             www.dltechnology.com.                                            m o u nt i n g  p a ck a ge  h a s  s p e c i f ic
                                                                              challenges. One such example is
              216 River Street, Haverhill, MA 01832  •  P: 978.374.6451  •  F: 978.372.4889  •  info@dltechnology.com  the optimization of design rules. In
                                                                              the initial layout, we observed the

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