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reliability for large-die flip-chip
lead-free BGA package in power
cycling and thermal cycling tests,”
61st ECTC 2011, pp. 921-926.
6. L. Garner, C. Zhang, K. S. Beh,
K. Helms, Y. L. Tan, “Effect of
compression loads on the solder
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packages,” 54th ECTC 2004, pp.
692-698.
7. T- C. C h iu , D. E d wa rd s , M.
Ahmad, “Ball grid array solder
joint reliability under system-level
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8. P. K. Bhatti, M. Pei, X. Fan,
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packages with thermal enabling
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9. X. Fan, M. Pei, P.K. Bhat ti,
“Effect of finite element modeling
techniques on solder joint fatigue
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10. G. Gust afsson, I. Guven, V.
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11. L. F. Coffin, “A study of the
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12. JEDEC STANDARD Temperature RoHS
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Biographies
Manish Nayini is Senior Engineer, Packaging Engineering at Marvell Semiconductor, USA, Hopewell
Junction, NY. He works on thermomechanical simulations at the package- and board-level. He has been with
Marvell for the past year; prior to that, he worked for 3 years at Globalfoundries in the Advanced Packaging
Development Group. He has a Masters in Mechanical Engineering from Arizona State U., and a Bachelors in
Mechanical Engineering from BITS Pilani, Goa, India. Email mnayini@marvell.com
Timothy Horn is a Packaging Reliability Engineer at GLOBALFOUNDRIES, USA. After completing his
BS in Microelectronic Engineering at RIT in 2015, he pursued a passion for material characterization through his work as a
reliability engineer at GLOBALFOUNDRIES, USA and by working on his MS in Materials Science at UVM (expected in May,
2021) as a part time endeavor.
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