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March • April 2019; Volume 23, Number 2

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Whether it’s 5G applications, bioimplantable electronics, the growing demand for power devices, or other challenges, the semiconductor packaging industry, powered by human brainpower, has always risen to the occasion. Looking ahead, we may be looking at artificial intelligence to help power the future of packaging design, manufacturing, and test. Enjoy the issue!


Cover image courtesy of Cohu

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White Paper: System-level, post-layout electrical analysis for high-density advanced packaging
As HDAP designs become more popular, the need for post-layout simulation (analog) and post-layout STA (digital) flows to augment basic physical verification (DRC and LVS) is growing. Mentor provides an accurate, automated flow that generates the required HDAP netlist for simulation/STA to enable HDAP designers to ensure that the HDAP will perform as designed.
Mentor, a Siemens Business

Industry News

April 2019

A*STAR and Soitec launched a joint program to develop a new layer transfer process for advanced packaging

The Agency for Science, Technology and Research’s (A*STAR) Institute of Microelectronics (IME) and Soitec (Euronext Paris), recently announced the launch of a joint program to develop and integrate a new layer transfer process within advanced wafer-level multi-chip packaging techniques. Based on the combination of IME’s fan-out wafer-level packaging (FOWLP) and 2.5D through- silicon interposer (TSI) technologies with Soitec’s Smart Cut™ technology, the new cost-competitive process offers higher performance, energy efficiency and increased product yield.

Advanced packaging is used in many of today’s systems-on-chip (SOCs) for servers, high-end mobile, industrial, and automotive applications. Such packaging involves various approaches for combining semiconductor chips into packages to reduce costs, improve power efficiency, and provide efficient heat dissipation. By 2022, the advanced packaging market segment is expected to triple to two million wafer starts for mid- to high-end applications [Source: Yole Development 2017 report for 3D TSV and 2.5D by 12” wafer starts]. The rising complexity of today’s chips with growing numbers of smaller and smaller transistors and circuits requiring high I/O counts is driving collaborative innovation across the advanced packaging process community focused on identifying cost effective solutions for manufacturing, and increased data bandwidth to support hand-held, cloud and edge computing applications.

One of the standard processes in advanced packaging involves using a full silicon wafer for the layer transfer process, which can cost up to 3 cents/mm 2 . Soitec will partner with IME over the next three years to evaluate the use of its Smart Cut™ technology on IME’s advanced packaging platforms FOWLP and 2.5D TSI, with the objective to integrate a new layer transfer process as a key step in future generations of packaging techniques. This new process targets improved performance, lower power consumption and reduced production costs by eliminating the need to consume a full silicon wafer. IME will also conduct tests to evaluate the reliability and robustness of the newly developed process, which will help Soitec to determine its long-term viability.

Smart Cut™ technology makes use of both implantation of light ions and wafer bonding to define and transfer ultra-thin single-crystal layers from one substrate to another. It works like an atomic scalpel and allows active layers to be managed independently from the supporting mechanical substrate. Key benefits include the creation of multiple thin nanometric scale layers of virtually defect-free silicon by utilizing low temperature bond and split techniques. These layers are then placed on top of active transistor circuitry. The thickness of the transferred layer can be determined with a high degree of precision by adjusting the implantation energy and process engineering. Transistors can then be completed using etch and deposition processes. Moreover, the donor substrate can be reused many times as the surface of the silicon wafer is repolished after each layer transfer operation, and the substrate can be reused.

As a leading research institute, IME brings together the global semiconductor supply chain, including fabless companies, foundries, OSATs, EDA suppliers, equipment manufacturers, and materials developers to demonstrate advanced packaging solutions for mobile, data-center, high-performance computing, 5G, IoT and automotive applications. Through this collaboration with Soitec, IME will provide advanced packaging expertise in architecture definition, modeling, design, process-integration, reliability-assessment and failure analysis. IME will execute the advanced packaging development in its fully functional, state-of-the-art 300mm wafer-level packaging, 2.5D/3DIC pilot line. IME’s end-to-end process capabilities and know-how in advanced FOWLP and 2.5D TSI will shorten development cycles and demonstrate cost-effective packaging solutions using Smart Cut™ technology. During the joint program, Soitec will contribute significant tool time, R&D personnel, and dedicated space in its clean room at its Pasir Ris fabrication facility in Singapore.

"Advanced packaging continues to be a bright spot in the high-value semiconductor market. We are excited to partner with Soitec to develop packaging solutions that will contribute to the dynamic growth of this high-potential segment in Singapore and worldwide," said Professor Dim-Lee Kwong, Covering Executive Director, IME.

“Soitec and IME believe Smart Cut™ technology will deliver breakthrough results, revolutionizing 2.5D/3D layer transfer process flow,” said Christophe Maleville, Soitec’s Chief Technology Officer. “This strategic collaboration will not only develop a new Smart Cut™ application serving new generations of advanced packaging, but also open up a brand new market for Soitec beyond traditional engineered substrate manufacturing.”

February 2019

Completion of Building Construction at Kuwabata Plant(Zone C, A-Building)

Hiroshima, Japan - February 5, 2019 - DISCO Corporation has completed construction of a new building with a seismically isolated structure at Kuwabata Plant (Kure City, Hiroshima), where precision processing equipment used for cutting, grinding, and polishing silicon wafers, process tools and consumables are manufactured. The floor space in the existing building (Zones A and B, A-Building) has been expanded as a result of this construction, and the production space will be increased approx. 1.5 times.
Zone C - (Construction completed in January 2019)
Zone B - (Construction completed in January 2015)
Zone A - (Construction completed in January 2010)

Purpose of Zone C Construction in A-Building, Kuwabata Plant

Enhancement of Precision Processing Tool Production System and BCM³ Support. The semiconductor and electronic component markets are expected to continue expanding in the future based on the development of IoT, AI, self-driving technologies, and installation of multiple cameras on smartphones. Demands for DISCO’s precision processing equipment and tools are also expected to increase accordingly. DISCO has two production sites, Kuwabata Plant and Kure Plant, in Kure City, Hiroshima. Precision processing equipment and precision processing tools are mainly produced in Kuwabata Plant and Kure Plant, respectively. By allocating a part of the production space in Zone B, Kuwabata Plant, for which construction was completed in January 2015, for precision processing tools, a second production site was established to improve BCM support. Moreover, by making Zone C in A-Building, Kuwabata Plant, for which construction was completed in January 2019, a production space for precision processing tools, DISCO will achieve further enhancement of the production system and BCM support, as well as more effective production through the promotion of automation.

  1. Precision processing equipment: Equipment used for cutting, grinding, and polishing silicon wafers, etc.
  2. Precision processing tool: Tools mounted on precision processing equipment which performs the cutting, grinding, and polishing. These are consumables and must be replaced frequently.
  3. BCM: Business Continuity Management Overview of Zone C in A-Building, Kuwabata Plan
Name Zone C in A-Building, Kuwabata Plant
Structure Seismically isolated structure
Total floor space Approx. 65,900 m² (Existing building: Approx. 128,500 m²)
Total Investment Approx. JPY 13.8 billion
Construction start February 2017
Construction completion January 31, 2019
Operation start February 2019
Future Plan (Extension of Zone D)  

In order to respond to expected future increases in demand, Zone D will be constructed in A-Building of Kuwabata Plant, following the completion of Zone C.

Name Zone D in A-Building, Kuwabata Plant
Structure Seismically isolated structure
Total floor space Approx. 67,400 m²
Total Investment Approx. JPY 14 billion
Construction Period September 2019 – August 2021

Reference: Decision for Further Expansion of Kuwabata Plant in Order to Enhance Production System of Precision Processing Tools (News Release, October 25, 2017)

For additional information: Yurika Araya, e-mail:

Indium Corporation Announces
Senior Level Promotions

Clinton, NY - January 29, 2019 Indium Corporation is proud to announce the promotion of three employees to high-level positions in their respective departments.
Scott Pringle has been promoted to Business Unit Vice President. Pringle will continue to be a member of the Management Team, with his new position bringing a focus on aligning the Global Account Sales and the China Field Sales organizations, as well as serving as leader and coordinator of the Asia Sales Leadership Team. Throughout his more than a decade at Indium Corporation, he has distinguished himself as an industry expert and built a strong global sales organization. He has broad and extensive international experience developing business in Europe, the Americas, and Asia.


Chris Bastecki has been promoted to the position of Director of Americas Sales and Global PCBA Marketing. Bastecki, who joined Indium Corporation in 2012, will now lead both the Americas sales and service organization, and the global PCBA product groups to create and execute successful sales strategies and sustained growth. He has more than 25 years of experience in electronics materials marketing, sales, and business management. Chris has a bachelor’s degree in metallurgical engineering from the University of Pittsburgh and an MBA from Carnegie Mellon University. He has participated in numerous leadership development programs at Harvard University and other institutions, as well as Six Sigma training.


Jonas Sjoberg has been promoted to Associate Director of Global Technical Service and Application Engineering. He provides direct management of the Asia Technical team, focusing on promoting career development among his team members through trade show participation and creation of papers for industry publications. Sjoberg also coordinates global technical initiatives with the other technical teams in Europe and the Americas. He joined Indium Corporation in 2014 and has more than 20 years of technical experience in the electronics industry, establishing himself as an industry expert.


Indium Corporation is a premier materials manufacturer and supplier to the global electronics, semiconductor, thin-film, and thermal management markets. Products include solders and fluxes; brazes; thermal interface materials; sputtering targets; indium, gallium, germanium, and tin metals and inorganic compounds; and NanoFoil®. Founded in 1934, the company has global technical support and factories located in China, Malaysia, Singapore, South Korea, the United Kingdom, and the USA.

For more information: or email

Sofradir and ULIS to invest €150M in French Nano 2022 program, part of EU initiative on microelectronics
Five-year investment to develop next-generation infrared detectors aims to strengthen Europe’s microelectronics ecosystem and ensure industry growth

Grenoble, France - January 21, 2019 – Sofradir and its subsidiary ULIS today announce their participation in the Nano 2022 initiative, which sees the Group invest €150M ($171M) over the period 2018-2022.

This announcement follows the European Commission’s approval on December 18, 2018 of the ‘Important Project of Common European Interest’ (IPCEI), a joint project by France, Germany, Italy and the UK to give €1.75 billion (approx. $2bn) in public support for research and innovation in microelectronics.

Nano 2022 is France’s initiative within the cross-border program that will support developments in nanotechnology, a market sector of strategic importance for the future, which includes applications such as smart sensors. The Auvergne-Rhone-Alpes region, where Sofradir and ULIS have operations, announced it will contribute €35M ($40M) to support Nano 2022.

Sofradir and ULIS, whose infrared technologies are used in a range of applications from space observation and environmental monitoring to security surveillance and predictive maintenance, will invest €150M ($171M) in the Nano 2022 initiative in order to develop next-generation infrared detectors

“Infrared technologies can offer the necessary solutions for improving assisted living, mobility, energy efficiency, security and environmental monitoring, which are all crucial societal needs,” said Jean-François Delepau, chairman and CEO of Sofradir and ULIS. “As a result of our investment, equipment manufacturers will benefit from the ease-of-use and performance these new products will offer.”

Nano 2022 will enable ULIS to develop the next generations of infrared detectors to address trends in autonomous systems for smart buildings (workspace management, energy savings), road safety and in-cabin comfort of vehicles. It also enables Sofradir to develop the very large dimension infrared detectors needed for space and astronomy observations as well as compact and light sensors that can be used in portable devices and on drones. Nano 2022 contributes to the funding of the pilot lines required for developing these technologies and products.

Sofradir and ULIS participate in Nano 2022 alongside other companies based in the Auvergne-Rhone-Alpes region, including STMicroelectronics and Soitec.

The IPCEI framework develops key cross-border R&D and infrastructure projects aimed at encouraging member states to channel their public spending into large projects. These make a clear contribution to economic growth, job creation and the competitiveness of Europe. The European Commission (DGComp) evaluates the funding conditions, ensuring they are in line with EU state aid rules.

For additional information:;;

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