Page 47 - ChipScale_Jul-Aug_2020-Digital

Embedded die (ED) technology is still in Within the telecom and infrastructure end there is a severe lack of supply on the market.
its early years in terms of adoption. Players market, SiP offers the significant packaging Therefore, the main drivers are cost reduction
like ACCESS Semiconductor and Schweizer size reduction, ease of heterogeneous chip and closing the supply-demand gap.
are investing huge amounts in new plants integration, and power reduction needed to Heterogeneous SiP packaging is a
in China. ED SiP is expected to grow at a drive high-speed signals. 2.5D SiP is usually natural outgrowth of hybrid and multi-
34% CAGR, from US$55 million in 2019, to based on a silicon interposer using fine-pitch chip packaging technologies that have been
US$315 million in 2025, with automotive, BEOL wiring and 3D TSV to enable high- developed to enable 5G telecommunication
telecom and infrastructure, and mobile density interconnection between multiple and HPCs, data servers, and graphics.
accounting for 96% of revenue. devices. These are high-end SiPs and the The internal speed in existing 2.5D Si
Within the mobile and consumer end technology is well established. However, interposers and 3D TSV solutions is already
market, a new generation of wireless these technologies are still very expensive and high, so performance is not the key driver
connectivity systems is needed for the 5G
roll-out: a disruptive technology boasting
SiP adoption in connectivity, RF, and
sensors. With higher performance demands
comes challenging electrical, thermal,
and mechanical requirements for longer
operational battery life. Performance and
miniaturization are, therefore, key drivers
for SiP (Figure 4).
RF and mmWave connectivity are
crucial to a faster communication rate
in this data-driven era. However, there
are new packaging design and technical
requirements needed to fully exploit the
potential of mmWave communication,
including specific integrated circuit
(IC) design, multi-band switching, and
interference management — especially
antenna packaging and optimization. The
current mainstream technique that involves
integrating these dies into a smaller form
factor is SiP.
Antenna-in-package (AiP) is a new trend
in IC packaging that is driving SiP because
it allows integration of all the complex RF
components, together with the baseband
circuitry, into a completely self-contained
module. This greatly facilitates the work of
the system integrator because there is no
longer a need to design complex RF circuits
at the application printed circuit board (PCB)
level. Also, the overall size of the complete
application is reduced.
Fur ther more, to power 5G, the
a p pl ic a t io n w i l l p r o b a bly n e e d
more battery space, so any possible
miniaturization is critical. As such, SiP
is an attractive solution. For the package
substrate in 5G applications, electrical
performance is advancing. Suppliers of
core and build-up materials are now the
key enablers. For 5G to work, connectivity
communication speed requires stringent
electrical performance. With these
new developments in SiP design,
manufacturers are required to minimize
signal loss and impedance loss through
a low dielectric material and smoother
interconnection trace.

45
Chip Scale Review July • August • 2020 [ChipScaleReview.com] 45