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lower energy consumption. To those
ends, we are working in the EU-founded
L3MATRIX and Mass Manufacturing
of Transceivers for Terabit/s Era
( M ASSTA RT ) proje ct s of fe r i ng
technological innovations in the fields
of silicon photonics and the integration
of 3D devices [3-5]. The aim of the
L3MATRIX project partners is to develop
a novel matrix with a larger scale than
any other device, and to integrate more Figure 3: Dual-sided cooling demonstrator for 3D Si-integration.
than 100 modulators on a single chip, and fluidic interposers with up to a 27x27mm on design modification based on first year
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laser sources with a logic chip (Figure 2). footprint (Figure 3). results, technology scaling from half format
So today, the main bottleneck to the to full format 610mmx305mm , as well
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realization of next-generation computing as the integration of vertical interconnect
systems for all large, secure data Chiplets gaining traction elements (VIE) and passive components.
applications/industries, including SiP The increasingly higher costs for The optimization of single process steps,
and SoC, is the lack of off-chip/off-core further node miniaturization in the IC but also the alignment and optimization
interconnects with low latency, low power, manufacturing process will also promote of the interfaces along the manufacturing
high bandwidth, and high density. One of the interconnection of chiplets. This means flows was an ongoing activity throughout
the most promising approaches to overcome that intellectual property (IP) blocks the entire project. Reference process
these challenges is the use of photonics. made in different technology nodes will flows based on photosensitive dry-film
This will be key to the introduction of be combined on an active interposer to dielectric material and non-photosensitive
disruptive computing technologies and reduce cost by increasing the production materials were developed including a semi-
photonics-enabled architectures, leading yield (smaller chips) and reuse across additive plating (SAP) process. Die shift
to faster, cheaper, power-efficient, secure, applications. High-density organic and warpage control to handle and process
denser solutions for industrial applications. substrates with or without embedding large molded fan-out panels were of key
Furthermore, generic co-integration technologies may also be a solution. To importance, including a smart alignment
with all building blocks of computing that end, Fraunhofer IZM started the PLC- strategy development from assembly to
technology will be possible, as photonic- consortium working on different R&D RDL processing. This enabled successful
based standard interfaces between building topics related to high-density embedding evaluations of newly developed materials
blocks are introduced and implemented. technologies in organic substrates [7,8]. A
close coordination between the different for the PLC partners. In addition to the
Next-generation computing solutions R&D thrusts was established to produce technical progress, a complex cost modeling
has been successfully implemented,
assembled panels in order to ensure a
A solution for next-generation continuous process flow. A major work which allowed the cost calculation and
computing might be that part of the package in the beginning of the project analysis to be done with fine granularity of
computing will migrate down to the was to collect data about the available reference applications taking into account
edge and the node level with substantial materials provided by the partners. Several process, material and design options, panel
advantages such as less required overall test layouts were designed for process utilization, and scalability. The development
bandwidth, less latency, and therefore development. The implementation and of the data collection tables has been the
faster decisions enabling new services, and improvement of the die shift compensation, result of a collaborative work with the
the possibility of sensor fusion. But next- as well as the warpage and thickness consortium. Different application scenarios
generation computing can also be based on measurement and evaluation, was a joint have been analyzed, and a comparison
substantially more efficient architectures effort necessary for the high-density between a mold-first and a RDL-first
that consume fractions of the energy that is redistribution layer (RDL). For this metal process flow was calculated.
needed today. The radical improvement of routing process, a fusion of wafer-level Standardization of panel sizes has
energy consumption of high-performance (thin-film) processing and printed circuit been discussed at various public events
computers (edge and cloud) is, therefore, board (PCB)-like substrate processing was and a standardization group has been
one of the major challenges of next- developed. Different material setups and installed within the framework of SEMI
generation computing. process combinations were assessed and with guidance and involvement of Panel
Creating very fast computing systems, improved and finally, were successfully Level Consortium members. Last, but
overcom i ng the cu r rent memor y applied to demonstrator packages. The not least, a couple of high-level events
bottleneck, and significantly improving work focus of the first year of the PLC at major international conferences have
energy efficiency will require 3D stacking was to establish and to optimize the entire been organized by the PLC 1.0. The Panel
of memories and logic ICs for high- process chain from assembly via molding Level Consortium has been widely visible
bandwidth memories (HBMs) [6]. With and RDL formation to device singulation on during the last two years and is considered
a dual-sided cooling approach, we have a half format 457mmx229mm panel. This as the best consortium on this topic. PLC
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successfully demonstrated the cooling of a also included the design of test vehicles and 2.0 will continue the R&D work of PLC
large 20x20mm heater die with targeted demonstrators, as well as first reliability 1.0, but will also focus on some specific
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672W heat dissipation by newly developed tests. The focus in the second year was targets. Additionally, Fraunhofer IZM will

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