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References
1. L. L. W. Leung, M. L. Sham, W. Ma, Y. C. Chen, J. R. Lin, T.
Chung, “System-in-package (SiP) Design: issues, approaches
and solutions,” 2006 Inter. Conf. on Electronic Materials and
Packaging, Kowloon, China, Dec. 2006, pp. 1-5.
2. B. J. Kim, S. H. Lee, J. B. Shim, N. H. Cho, J. Y. Khim,
“Design constraints and scale down evolution in advanced
semiconductor packages,” 2021 54th Inter. Symp. on
Microelectronics (IMAPS), San Diego, USA, Oct. 2021.
3. L. He, S. Elassaad, Y. Shi, Y. Hu, W. Yao, “System-in-
package: electrical and layout perspectives,” Found. Trends
Electron. Des. Autom, Vol. 4, No. 4 (2011), pp. 223-306.
4. J. Liu, Z. Yang, Q. Zeng, “Research on thermal performance
of single chip based on SiP technology,” 2020 21st Inter.
Conf. on Electronic Packaging Tech. (ICEPT), Guangzhou,
China, Aug. 2020, pp. 1-3.
5. A. R. Moreno, F. R. I. Gomez, E. M. Graycochea, “Enhanced
loop height optimization for complex configuration on QFN
device,” 2020 IEEE 22nd Electronics Packaging Tech. Conf.
(EPTC), Singapore, Dec. 2020, pp. 182-184.
6. K. Hollstein, L. Yang, Y. Gao, K. Weide-Zaage,
“Identification of influencing PCB design parameters on
thermal performance of a QFN package,” 2020 21st Inter.
Figure 8: Temperature distribution of the package surface (1W). Conf. on Thermal, Mech. and Multi-Physics Simulation
and Experiments in Microelectronics and Microsystems
Summary (EuroSimE), Kracow, Poland, July 2020, pp. 1-5.
Highly-integrated packaging is one of the driving forces for 7. B. J. Kim, W. B. Bang, G. J. Kim, J. Y. Jung, J. H. Yoon,
high-performance and small form factor packages. As multi- “Introduction of routable molded lead frame and its
functional I/O density increases, the importance of thermal application,” Jour. of the Microelectronics and Packaging
management also increases. In this study, MCM rtMLF is Soc., Vol. 22, No. 2 (2015), pp. 41-45.
suggested for highly-integrated packaging with internal 8. B. J. Kim, H. I. Jeon, G. J. Kim, N. H. Cho, J. Y. Khim, Y.
routing that connects die to die and provides high heat K. Kim, “Wettable flank routable thin MicroLeadFrame for
dissipation. Internal routing leads are supported by a pre-resin automotive applications,” Microelectron Reliab, Vol. 135
that is filled during substrate fabrication. It can overcome the (2022).
limitations of a conventional QFN design. 9. B. J. Kim, H. I. Jeon, D. Y. Park, G. J. Kim, N. H. Cho,
From this research, the feasibility of the MCM rtMLF with J. Y. Khim, “EMI shielding leadless package solution for
internal routing leads was checked. The new structure passed automotive,” Jour. of Advanced Joining Processes, Vol. 5
AEC-Q006 reliability testing. Through electrical simulation (2022).
comparison, the better electrical performance of MCM rtMLF 10. C. C. Hsieh, C. H. Wu, D. Yu, “Analysis and comparison of
over two single QFN packages was verified. In addition, the thermal performance of advanced packaging technologies
high heat dissipation property of the MCM rtMLF package for state-of-the-art mobile applications”, 2016 IEEE 66th
was checked by comparing it with MCM two-layer CSP Electronic Comp. and Tech. Conf. (ECTC), Las Vegas, USA,
designs. The routable molded leadframe can provide a highly- May 2016, pp. 1430-1438.
integrated solution with high heat dissipation and will enable
application of this platform to be expanded in various markets.
Acknowledgements
MicroLeadFrame, MLF and rtMLF are registered
trademarks of Amkor Technology, Inc. This article was
originally presented at the 2022 IEEE 24th Electronics
Packaging Technology Conference (EPTC) and has been edited
for publication in Chip Scale Review.
Biographies
DaeYoung Park is a Researcher, Advanced Maintstream Development, R&D, at Amkor Technology Korea, Inc., Incheon,
Republic of Korea. Email daeyoung.park@amkor.co.kr;
Hyeongll Jeon is Senior Director, Advanced MS Development Project Leader at Amkor Technology Korea, Inc., Incheon,
Republic of Korea.
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