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grinding wheel type A would be the best
choice. Finally, the double-sided SiP
structure passed reliability requirements
including pre-condition MSL 3, TCT (1,000
cycles), u-HAST (96 hours) and HTSL
(1,000 hours). The double-sided SiP can
provide an innovative solution to address
the small form factor, cost reduction,
electrical performance, and time-to-market
requirements for 5G and wearable products
in the near future.
Table 3: Summary of reliability tests conducted.
References
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grit size with wheel D because of the higher Summary 2. M. Tsai, R. Chiu, D. Huang, F. Kao,
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the smooth silicon die surface and mold a double-sided SiP structure can provide packaging solutions of 3D double side
surface. The test results of the roughness good thermal performance by using a molding with system in package for
and 3-point bending using the different thermal pad design and TIM (i.e., Ag epoxy IoT and 5G application,” Proc. 69th
grinding wheel types are shown in Figures with 25W/mK with 0.99x θJA ratio with ECTC, 2019, pp. 700-706.
6a and 6b. 24% thermal enhancement, and 0.75y θJB 3. M. Tsai, R. Chiu, Ming-fan Tsai,
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wheel type (wheel type D) resulted in a the small form factor and good electrical “Mechanical reliability analysis of
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but in contrast, it increased process time. double-sided SiP structure, we studied Packaging (ICEP), 2021, pp. 93-94.
The double-sided cross-section image of the effects of different die thicknesses and 5. B-H. Ma, D. Ho, Y-P. Wang, F. Yen,
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temperature storage life (HTSL) testing at throughput. To achieve a higher throughput,
Biographies
David Wang is a Department Manager, Corporate R&D at Siliconware Precision Industries Co., Ltd.,
Taichung, Taiwan, R.O.C. He has over 25 years of industry experience especially focusing on fan-out packaging
technology development and advanced assembly analysis. He has published over 10 conference papers and
patents. Email: davidwang1@spil.com.tw
Mike Tsai is a Technical Deputy Manager, Advanced SiP Product Integration at Siliconware Precision
Industries Co., Ltd., Taichung, Taiwan, R.O.C. He received his MS degree from National Chung Hsing U.
(NCHU). He has over 10 years of job experience and published 11 papers in the semiconductor industry, with a special focus on
FC, PoP and SiP of advanced assembly technology.
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