Page 11 - Chip Scale Review_May June_2022-digital
P. 11

complexity from the assembly domain   Applied Physics from the Hebrew U.   where he focuses on NIL-related
        to the wafer manufacturing domain.   of Jerusalem with a focus on nano-  equipment and technology. He has a
        It provides an ideal platform for post-  lithography. Formerly, he worked as   doctorate in technical physics from the
        processing of silicon photonic wafers   R&D scientist, Sales & Marketing   Johannes Kepler U. Linz, specializing in
        for the photonic “bumping” process to   manager for Nanonics Imaging. Email:    nanoscience and semiconductor physics.
        be performed either at semiconductor   hesham.taha@teramount.com.
        foundries, or at outsourced semiconductor   Martin Eibelhuber is Product Manager
        assembly and test (OSAT) facilities.   at EV Group, Florian am Inn, Austria,
        As part of the joint collaboration, EVG
        provided NIL process development
        and prototyping services through its
        NILPhotonics Competence Center,
        as well as expertise in both CMOS
        and photonics manufact uring, to
        assist Teramount in accelerating the
        development and productization of its
        PhotonicPlug technology.

        Summary
          The Photonic Bump is a transformational
        solution for establishing a scalable
        silicon photonics packaging platform that
        generates, for the first time, an effective
        “through-chip optical via” for seamless
        photonics and electronics integration
        through 3D packaging and interposer
        geometries. It holds the promise to align
        silicon photonics with the standard
        semiconductor manufacturing ecosystem
        and to leverage silicon photonics to
        volume manufacturing for a variety of
        emerging applications.
        References
          1.  M A R K ET S A N D M A R K ET S
            Report, “Silicon Photonics Market
            with COVID-19 Impact Analysis by
            Product (Transceivers, Switches),
            Application (Data Center & High-
            performance Computing, Telecom.),
            Waveg uide, Component, a nd
            Geography - Global Forecast to
            2027,” Nov. 2021.
          2.  A. Israel, et al., “Photonic plug
            for scalable silicon photonics
            packaging,” Proceedings Volume
            11286, Optical Interconnects XX;
            1128607 (2020).
          3.  M. Eibelhuber, et al., “Nanoimprint
            Lithography Enables Cost-effective
            Production of Photonics,” Photonics
            Spectra, Feb. 2015.

        Biographies
          Hesham Taha is CEO at Teramount,
        Jerusalem, Israel. He has a PhD in


                                                               Chip Scale Review   May  •  June  •  2022   [ChipScaleReview.com]  9 9
   6   7   8   9   10   11   12   13   14   15   16