Page 40 - Chip Scale Review_January February_2022-digital

substrate (FOCoS), etc. demonstration. Moreover, 3x3mm
However, those are the daisy chain loops on the TF-RDL
“die-middle” solutions and ceramic substrate are designed to
and not a true die-last check the connectivity of the TF-RDL
solution. Because dies directly to the substrate. The TV also
are bonded to the TF- aims to build a fine-line 2.2D substrate
RDL first and then larger than the reticle size (33x26mm).
molded and debonded To improve ease of manufacture of the
b efo r e jo i n i n g t o 2.2D substrate, adapting thermal reflow
the substrate, it is in a conventional solder reflow furnace
desirable to have a is desirable.
true die-last substrate
solution based on TF- 2.2D integrated substrate TV
RDL. A true die-last manufacturing process
T F-R DL subst rate The TV used to demonstrate the
Figure 2: Classification of HPC substrates according to their complexity of s o l u t i o n b e n e f i t s 2.2D integrated substrate manufacture
packaging structure. f lexibility, as well process flow is shown in Figure 3. The
as enabling known copper pillars are manufactured on
production for over ten years because good die and known good substrates
of its benefit to the system’s electrical before assembly, and reworkability, et al. AlN substrate, where the upper part of
performance. Solders are used for the SiPlus has proposed the pillars is electroplated with 5µm Ni
interconnection of the silicon interposer [1] a 2.2D die-last
to the underlying substrate. However, solution to enable TF-
the solder itself also can be modeled as RDL directly on the
resistance, capacitance, and inductance. substrate.
So removing the solders in the package
would be beneficial to the electrical 2.2D structure
performance of the system. Therefore,
solder-less solutions like fan-out wafer- verification
level packaging (FOWLP), integrated requirements
fan-out wafer-level packaging (InFO- Because TF-RDL is
WLP), and embedded die have been in fragile and easy to curl
production for many years. if one removes it from
Figure 2 categorizes HPC packaging a carrier, in order to be
by the generic “through-x via” (TXV) able to use it as a die-
and solder components needed inside last substrate it needs
their structure, thereby increasing to meet the following
structure complexity from 2.0D [3] to requirements: 1) The
2.5D. For the 2.5D structure, a silicon dimensional stability
interposer with TSVs is connected to of the TF-RDL needs
the underlayer cored substrate with t o be m ai nt ai ne d ,
solders. The cored substrate has through- otherwise, there will
laminated vias (TLVs). On the other be misregist ration Figure 3: The 2.2D TV integrated substrate manufacturing process flow.
hand, the 2.0D packaging is a TSV-less, between the TF-RDL
TLV-less, and solder-less structure with and the substrate; 2)
the shortest interconnection distance in The robustness of the joints between
the Z direction for the packaging. SiPlus the TF-RDL and the substrate needs to
has verified the 2.0D test vehicle’s (TV’s) pass the substrate reliability test; and
manufacturability and reliability with 3) It is beneficial to utilize the existing
Nanya PCB Co. [4]. infrastructure to realize the low-cost
Recently, the TSV-less redistribution manufacturing process.
layer (R DL)-f irst technology has A 2.2D TV was designed to verify
become popular among foundries and the above requirements. The TV
outsourced semiconductor assembly comprises two portions: the TF-RDL
and test suppliers (OSATS). Various and the substrate. The joining segment
trade names are used for this thin- of the TF-RDL is composed of a copper
film RDL (TF-RDL)-based TSV-less pad with solder plating on a polyimide
interposer structure, namely, silicon-less dielectric. The substrate can be ceramic,
interconnect technology (SLIT), organic laminated organic or glass, etc. Copper
interposer chip-on-wafer-on-substrate pillars with Au surface finish on AlN Figure 4: One 60x60mm ceramic substrate and
®
(CoWoS -R), R-Cube, fan-out chip on ceramic substrate are used for the TV twenty-one 20x20mm ceramic substrates are
mounted on the 12” patterned glass wafer.
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