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Volume 27, Number 4
July • August 2023
The Future of Semiconductor Packaging
FEATURE ARTICLES
STAFF
Kim Newman
Publisher 10 Transitioning from 3D packaging to 3D heterogeneous
knewman@chipscalereview.com integration (3DHI)
By John Park, Vinod Kumar Khera [Cadence Design Systems]
Lawrence Michaels
Managing Director/Editor
19 Heterogeneous integration of chiplets technology enabled by
lmichaels@chipscalereview.com
Debra Vogler advanced package architectures, first-level interconnect
Senior Technical Editor By Nelson Fan, Eric Ng [ASMPT Limited]
dvogler@chipscalereview.com
28 Parallel validation strategies minimize debug time and ensure
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