Page 5 - Chip Scale Review_November December_2022-digital
P. 5
Volume 26, Number 6
November • December 2022
The Future of Semiconductor Packaging
FEATURE ARTICLES
STAFF
Kim Newman 26 Device validation: the ultimate test frontier
Publisher By Dave Armstrong
knewman@chipscalereview.com [Advantest America, Inc.]
Lawrence Michaels
Managing Director/Editor 34 Large-panel fan-out perspective on cost, yield, and capability
lmichaels@chipscalereview.com
By Clifford Sandstrom, Robin Davis, Benedict San Jose
Debra Vogler [Deca Technologies, Inc.]
Senior Technical Editor
41 Powering chips from the backside
dvogler@chipscalereview.com
By Naoto Horiguchi, Eric Beyne
[imec]
SUBSCRIPTION—INQUIRIES
Chip Scale Review
All subscription changes, additions, deletions to any
and all subscriptions should be made by email only to
subs@chipscalereview.com
Call for Technical Articles and
Advertising Production Inquiries: Technology Trends Columns
Lawrence Michaels
lmichaels@chipscalereview.com Original, well-written articles are the lifeblood of
Chip Scale Review. We welcome your contributions on
Copyright © 2022 Haley Publishing Inc. advanced semiconductor packaging technologies,
Chip Scale Review (ISSN 1526-1344) is a registered trademark of
Haley Publishing Inc. All rights reserved. processes and materials. CSR features columns on current
technology trends, market updates and insightful guest
Subscriptions in the U.S. are available without charge to qualified
individuals in the electronics industry. editorials are typically included in every issue. Our
Chip Scale Review, (ISSN 1526-1344), is published six times a
year with issues in January-February, March-April, May-June, July- spectrum of content coverage is specifically focused on
August, September-October and November-December. Periodical
postage paid at Gilroy, Calif., and additional offices. these BEOL & MEOL topics:
POSTMASTER: Send address changes to Chip Scale Review magazine • Wafer-level Packaging (WLP) • Chiplets
P.O. Box 2165 • Panel-level Packaging (PLP) • Lithography
Morgan Hill, CA 95038 • Heterogeneous Integration (HI) • Organic and Inorganic Substrates and
Tel: +1-408-846-8580
E-Mail: subs@chipscalereview.com • AI and Quantum Technologies Interposers, Glass Based Solutions
• Through-Silicon Vias (TSVs) • Advanced IC Assembly/Packaging
Printed in the United States • 3D Stacking & RDL Interconnects • Bonding/Debonding
• System-in-Package (SiP) • Integrating ICs with Nanotechnology
• Package-on-Package (PoP) • MEMS, RF/Wireless
• System-on-Package (SoP) • Optoelectronic/Photonic Devices
• Chip-on-Wafer (CoW) • Inspection/ Metrology
• Multi-Chip Modules (MCM) • Wafer/Device/System Test & Burn-in
Send abstracts to: editor@chipscalereview.com
Chip Scale Review November • December • 2022 [ChipScaleReview.com] 3 3