The photo is a graphical representation of an intermediate step in the RDL-first fan-out process whereby the dies are placed on top of the redistribution layer (RDL) architecture before overmolding. Prior steps in the process include application of a release layer to the carrier, followed by addition of redistribution layers on top of the release layer. The RDL-first fan-out process offers distinctive advantages in terms of reduced known good die (KGD) loss, improved line/space density, etc.
Cover photo courtesy of Brewer Science Inc.
A 300mm wafer and a 510 x 515mm panel are about to be electroplated for packaging. Electroplating at the panel scale is no longer a barrier for form factor adoption in packaging. Tokyo Electron has partnered with customers to develop cutting-edge processing equipment, such as the StratusTM P300 and P500 that can process the substrates shown to create fine packaging features at superior uniformities.
Cover photo courtesy of Tokyo Electron.