Industry Events - 2017

March 2017


Packaging news from SEMICON Korea

By Steffen Kroehnert [NANIUM S.A]

The biggest event for the semiconductor industry in Korea — SEMICON Korea — celebrated its 30th anniversary this year. The event took place February 8-10, 2017, at COEX in Seoul. It featured approximately 600 exhibiting companies and 40,000 attendees along with keynote speeches, the SEMI Technology Symposium (STS), Test Forum, Market Seminar, Smart Manufacturing Forum, System LSI Forum, Metrology Inspection Forum, and the Supplier Search Program.

Luc Van den hove, President & CEO of imec
SEMICON Korea Exposition Hall

  In his keynote address, Sungjoo Hong, Executive VP and Head of R&D at SK hynix, talked about the increasing difficulties of scaling, and the alternative technologies developed to manage the move from “happy scaling” to “hard scaling.” Luc Van den hove, President & CEO of imec, said, “Moore’s legacy will be the heartbeat of the semiconductor industry for many more decades, enabled by 3D constructions with nanowire as vertical interconnects inside the die, but also by heterogeneous integration and fan-out wafer-level packaging (FOWLP).” Jan Vardaman, Founder and CEO of TechSearch International, said in her Market Briefing presentation (“The Future of Fan-Out Wafer-Level Packaging”), that by removing the substrate from the package, we are facing a new level of chip-package interaction (CPI) challenges, and need to factor this in for next technology nodes.

  Session 6 of the STS – with its theme “Electropackage System and Interconnect Product” – has been the most interesting with respect to packaging. The organizing committee of that session noted that, “As customers demand new electronic devices and performance enhancement, high-tech technology is required for package processes, which had been treated as simple manufacturing in the past. In the meantime, advanced wafer-level packaging is attracting attention as a future technology. This is due to its high cost competitiveness compared to existing packaging processes and the ability to package system-in-packages (SIPs).” As the first invited speaker of this session (“Where Is the Destination of the Packaging Technology”), Dr. Choon Heung Lee, Global CTO of Lam Research, said that in terms of FOWLP, it is all about manufacturing capacity. The technology is available and mature, and he observed that embedded multi-chip fan-out modules with optimized system design will be the future.


22nd Annual SMTA Pan Pacific Microelectronics Symposium

Steering Committee and Session Chairs

The 2017 SMTA Pan Pacific Symposium (held at Sheraton Kauai Resort in Koloa, HI, USA) included over 50 presentations on new technology trends in the electronics manufacturing industry. The intimate setting of the symposium provided ample opportunity for attendees to make quality professional connections during a variety of social activities such as the golf tournament, welcome reception, and private luau.

The four-day event kicked off Monday, February 6, 2017 with a Plenary Session that included insightful presentations by three respected experts. Dwight Howard (Delphi) presented Rapid Electronics Design with Advanced Tools and Optimized Workflow. Matthew Hudes (bdlBiologx) spoke on the topic of Fostering Innovation in Digital Health. Horatio Quinones, PhD, (FDCS) presented Intelligent Manufacturing Automation.

The technical sessions and panel focused on topics including Materials & Reliability, Nanotechnology, Design & Manufacturing Strategies, Packaging Solutions, Advanced Packaging, Roadmaps, Test, and Embedding & Fan-Out Packaging. An expert panel discussion on Ionic Test Methods closed out the day on Tuesday. Chuck Bauer, PhD, (TechLead Corp.) moderated the panel featuring technical experts from Celestica Inc., Foresite Inc., Indium Corporation, and KYZEN Corporation.

Kyung Paik, PhD (KAIST)

The program featured two keynote speakers, Kyung Paik, PhD (KAIST) and Thomas Brunschwiler, PhD, (IBM Research – Zurich). On Tuesday, February 7, Dr. Paik gave an interesting keynote presentation on “Fabric-Based Fine Pitch Interconnect Technology Using Anisotropic Conductive Films (ACFs).” The presentation outlined a major technological advancement in the area of flexible wearable electronics. Dr. Brunschwiler shared his expertise in 3D heterogeneous integration in his Wednesday morning keynote presentation on "Multi-Functional Packaging Technologies Supporting Performance and Efficiency Scaling Beyond Exa-Scale Systems." He touched on nanotech applications for assembly, orthogonal scaling and neuromorphic computing in achieving true artificial intelligence and big data handling capabilities for real world applications.

The 2018 symposium will be held February 5-8 at the Hapuna Beach Prince Resort on the Big Island of Hawaii. Abstracts can be submitted online at www.smta.org/panpac/call_for_papers.cfm. For more information on the Pan Pacific Microelectronics Symposium, contact Tanya Martin at 952-920-7682 or tanya@smta.org.


ECTC preview

By Mark Poliks [Binghamton University]

IEEE’s 67th Electronic Components and Technology Conference (ECTC) will be held at the Walt Disney World Swan & Dolphin Resort, Lake Buena Vista, Florida, from May 30 to June 2, 2017. This premier international annual conference, sponsored by the IEEE Components, Packaging and Manufacturing Technology (CPMT) Society, brings together key stakeholders of the global microelectronic packaging industry, such as semiconductor companies, foundry and OSAT service providers, equipment manufacturers, material suppliers, research institutions and universities, all under one roof. More than 1,400 people attended the 66th ECTC in Las Vegas, Nevada, in May 2016.

67th ECTC Location: Walt Disney World Swan and Dolphin Resort at Lake Buena Vista, Florida.
67th ECTC ExComm (from left to right): Christopher Bower, Assistant Program Chair, X-Celeprint Inc.; Mark Poliks, Program Chair, Binghamton University; Henning Braunisch, General Chair, Intel Corporation; Sam Karikalan, Vice-General Chair, Broadcom Limited.
Materials and Process Subcommittee: one of ten subcommittees at the ECTC Dallas Abstract Selection meeting.

At this year’s ECTC, more than 360 technical papers are scheduled to be presented in 36 oral sessions and five interactive presentation sessions. The oral sessions will feature selected papers on key topics such as flip-chip packaging, 3D/TSV technologies, wafer-level packaging, design for RF performance and signal/power integrity, thermal and mechanical modeling, optoelectronics packaging, and materials and reliability. Interactive presentation sessions will showcase papers in a format that encourages more in-depth discussion and interaction with authors about their work. Authors from 22 countries are expected to be presenters.

The ECTC will also feature panel and special sessions with industry experts covering a number of important and emerging topic areas. On Tuesday, May 30 at 10:00AM, Vikas Gupta and Pradeep Lall will chair a session on “Material and Package Reliability Needs/Challenges for Harsh Environments.” Then at 2:00PM, Bing Dang will chair a panel session on “Flexible Hybrid Electronics – Electronics Outside the Box,” where a panel of experts will discuss how innovation in device integration and packaging are adapted to the shape of the human body and vehicles. Tuesday evening will also include the ECTC Panel Session at 7:30PM on “Panel Fan-Out Manufacturing: Why, When, and How?” chaired by CPMT President Jean Trewhella and Young Gon Kim. The ECTC Luncheon Keynote Speaker on Wednesday will be Babak Sabi, Corporate Vice President and Director of Assembly and Test Technology Development, Intel Corporation. His talk is entitled “Advanced Packaging Opportunities and Challenges.”

The CPMT Women’s Panel chaired by Kitty Pearsall on Wednesday, May 31, at 6:30PM will discuss “Emotional Intelligence (EI) – Link to Successful Leadership.” Also on Wednesday at 7:30PM, Luke England will chair the ECTC Plenary Session entitled “Packaging for Autonomous Vehicle Electronics;” the session will feature key technologists sharing their views on the electronics challenges needed to support widespread implementation of driver-less vehicles on the road. On Thursday, June 1 at 8:00PM, the CPMT Seminar “3D Printing Tools, Technologies and Applications,” will be moderated by Venkatesh Sundaram and Yasumitsu Orii.

Supplementing the technical program, ECTC also offers several Professional Development Courses (PDCs) and Technology Corner exhibits. Co-located with the IEEE ITherm Conference this year, the 67th ECTC will offer 18 PDCs, organized by the PDC Committee chaired by Kitty Pearsall. The PDCs will take place on Tuesday, May 30th, and are taught by distinguished experts in their respective fields. The Technology Corner will showcase the latest technologies and products offered by more than 100 leading companies in the electronic components, materials, packaging and services fields. ECTC also offers attendees numerous opportunities for networking and discussion with colleagues during coffee breaks, daily luncheons, and nightly receptions. Don’t miss out on the industry’s premier event!

Go to www.ectc.net for more information.